Tutorials for Indicon – 2005

01 Speaker : Dr. Rajesh Sundaresan,
Electrical Communication Engineering Department
Indian Institute of Science,
Title : Recent advances in data communication over wireless channels
The past few years have seen a dramatic growth in the demand for data services over wireless communication channels. Recent wireless standards have evolved to meet the needs of increased number of users as well as increased throughput per user. The tutorial will present an overview of some common techniques that improve the efficiency of high speed packet data links in cellular systems. We will review some basic techniques such as link adaptation, incremental redundancy, hybrid ARQ, and smart scheduling, and then will look at some recent progress in the areas of MIMO transceiver design, interference mitigation, and resource allocation.
02 Speaker : Prof. K.N. Bhat
Department of Electrical Engineering
IIT Madras, Chennai 600 036, INDIA
Title : Silicon on Insulator (SOI) Technology for Microelectronics and MEMS
Silicon on Insulator MOSFETs, are very promising candidates for VLSI/ULSI, when the bulk CMOS technology is being pushed towards its limits with channel lengths below 70 mm. This technology also holds the promise of playing a key role in Micro-Electro Mechanical Systems (MEMS) where integration of micro-machined mechanical components with electronics is inevitable. The problems associated with bulk CMOS Technology for realizing scaled down devices with low power supply voltages are first presented. This is followed by a detailed analysis of the SOI MOSFETs. Both Fully Depleted (FD) and Partially Depleted (PD) SOI transistors are presented. The impact of FD-SOI transistors realized on Ultra-Thin (UT) SOI films for the design of ultimate MOSFET for ULSI is proposed to be discussed. The discussions include the topics on the dual-gate operation for enhanced electron mobility as well as on the effect of SOI film thickness and the channel geometry (length & width) on the threshold voltage and sub-threshold slope.
The details of the various commercial SOI wafer technologies are presented and their suitability for VLSI/ULSI and for MEMS application is discussed. The application of SOI for MEMS is illustrated with some examples drawn from pressure sensors and accelerometers to demonstrate how the SOI wafer can be used for on-chip integration of electronics and MEMS devices. The benefits of the SOI CMOS technology for operation in harsh environment (high temperature and radiation) and for integration of electronics with Micro-machined structures will be illustrated.
03 Speaker : Dr. S. R. Kannan, Dr. V. Jayashankar & Dr. R. Sarathi
Department of Electrical Engineering
IIT Madras, Chennai 600 036, INDIA
Title : Condition Monitoring of Transformers – Trends
Power transformer in service, go through natural ageing under operating stress conditions as well as accelerated ageing due to contamination and abnormal service conditions such as overloading, short-circuit in System or over voltage. A power transformer outage can cause wide disruption of power. Among the costliest equipment in Power system, the lead-time for repair or replacement of Power Transformer is several months. Hence, Utilities are striving to improve the life management of equipment and reliability of supply by continuous monitoring of the transformer and diagnose its condition for pre-emptive action.
The purpose of condition monitoring is to

detect faults at incipient stage and avoid catastrophic faults
reduce rate of degradation and extend life of transformer
reduce maintenance costs by doing condition-based maintenance rather than a time-based one
developing data base which helps more accurate failure analysis and enable
design/process/system improvements to improve reliability in service
The workshop will provide an overview of the current monitoring methods, their limitations and some of the research work going on worldwide aiming at cost effective diagnostics and estimation of the loss of life of the transformer. The workshop, with faculty drawn from IIT-Madras, is essentially targeted at postgraduate and research students in Power apparatus and Systems area and will be informative to Utility engineers responsible for the life-management of substation equipment.
04 Speaker : V. Kamakoti and Shankar Balachandran
Department of Computer Science & Engineering
IIT Madras, Chennai 600 036, INDIA
Title : Digital Design Verification
Current digital designs use multiple subsystems that interact in many complex ways. These large designs are typically implemented using hardware description languages (HDLs) like Verilog and VHDL and more recently using languages like System C and System Verilog. With any complex system a natural question to ask is how correct the system is. Many tools are available to verify whether the design is functionally correct and whether it complies with the original specification. This tutorial deals with methodologies for verifying current day digital designs.
Verification of large designs is a complex task in itself. Design teams typically develop test strategies even as early as the code development stage. Developing a test strategy that tests for various corner cases is specifically a very demanding task. Typically, a designer who has extensive domain expertise is called upon to create the test plan that is translated to vast amounts of code written by large verification teams. More than half the design resources and > 70% of time to develop a product is used by the verification phase of chip design due to the difficulty in finding a good strategy to check all cornet cases. Current trends are to make sure the design is “correct by construction” and verify the design right from the early stages. Effective time to market is achieved only when the design is done “right the very first time”. Such a goal is also very important to critical designs that are used in avionics, nuclear applications and in the health industry.
The objective of this tutorial is to create awareness on testing large scale designs in a highly automated fashion.
05 Speaker : Dr. A. N. Rajagopalan & Dr. S. Srinivasan
Department of Electrical Engineering
IIT Madras, Chennai 600 036, INDIA
Title : Digital Image Processing: Basics, Developments, and Emerging Trends
Abstract Over the years, image processing has emerged as an active area of research. The techniques involved have found applications in areas as diverse as satellite imaging, machine vision, image communication, robotics, geoscience, medicine, and biometric recognition. The aim of this tutorial is three-fold: introduce the basics of image processing to beginners, discuss ongoing developments in this field, and suggest scope for possible research.

In this tutorial, we will discuss

Image transforms
Image enhancement
Feature extraction
Image segmentation
Image compression standards and their implementation.

Research scholars, teachers, as well as professionals working in the area of image processing will find this tutorial very useful.

06 Speaker : Dr. P.C. Chandrasekharan
Former Dean of Post Graduate Studies
Anna University, Chennai 600 025, INDIA
Title : Linear Least Square Estimation Problem: From Gauss to Kalman and Beyond
The problem of statistical inference, namely making inferences about a random variable or process from a related observed random variable or process is fundamental in many branches of science and engineering. The problem occurs in diverse fields such as control, communications, signal processing and econometrics. The subject is vast but in this tutorial exposition, we confine our attention to linear, least mean square estimation problem. Both deterministic and stochastic least square estimation problems are treated in a common conceptual frame work by defining appropriate Hilbert spaces along with their corresponding scalar inner products. The projection theorem in Hilbert space is invoked to give a geometric flavour to the estimation problem, thus making it highly intuitive. As a sequel to this approach the innovations processwhich is fundamental to a large class of estimation problems presented